概要
micropythonでshrike-lite、やってみた。
verilogでAVRを書く。
1から100まで数えてみた。
投入したソースコード
rom[0] <= 16'hE000; // avr.ldi(16, 0)
rom[1] <= 16'h9503; // avr.inc(16)
rom[2] <= 16'hB901; // avr.out(1, 16)
rom[3] <= 16'h3604; // avr.cpi(16, 100)
rom[4] <= 16'hF7E1; // avr.brne(-3)
rom[5] <= 16'hC000; //
実行結果
>vvp a.out
VCD info: dumpfile test.vcd opened for output.
pc: x r16: x PIN: x ddr: xx port: xx
pc: 0 r16: x PIN: z ddr: 00 port: 00
pc: 1 r16: 0 PIN: z ddr: 00 port: 00
pc: 2 r16: 1 PIN: z ddr: 00 port: 00
pc: 3 r16: 1 PIN: 0 ddr: 01 port: 00
pc: 4 r16: 1 PIN: 0 ddr: 01 port: 00
pc: 1 r16: 1 PIN: 0 ddr: 01 port: 00
pc: 2 r16: 2 PIN: 0 ddr: 01 port: 00
pc: 3 r16: 2 PIN: z ddr: 02 port: 00
pc: 4 r16: 2 PIN: z ddr: 02 port: 00
pc: 1 r16: 2 PIN: z ddr: 02 port: 00
pc: 2 r16: 3 PIN: z ddr: 02 port: 00
pc: 3 r16: 3 PIN: 0 ddr: 03 port: 00
pc: 4 r16: 3 PIN: 0 ddr: 03 port: 00
pc: 1 r16: 3 PIN: 0 ddr: 03 port: 00
pc: 2 r16: 4 PIN: 0 ddr: 03 port: 00
pc: 3 r16: 4 PIN: z ddr: 04 port: 00
pc: 4 r16: 4 PIN: z ddr: 04 port: 00
pc: 1 r16: 4 PIN: z ddr: 04 port: 00
pc: 2 r16: 5 PIN: z ddr: 04 port: 00
pc: 3 r16: 5 PIN: 0 ddr: 05 port: 00
pc: 4 r16: 5 PIN: 0 ddr: 05 port: 00
pc: 1 r16: 5 PIN: 0 ddr: 05 port: 00
pc: 2 r16: 6 PIN: 0 ddr: 05 port: 00
pc: 3 r16: 6 PIN: z ddr: 06 port: 00
pc: 4 r16: 6 PIN: z ddr: 06 port: 00
pc: 1 r16: 6 PIN: z ddr: 06 port: 00
pc: 2 r16: 7 PIN: z ddr: 06 port: 00
pc: 3 r16: 7 PIN: 0 ddr: 07 port: 00
pc: 4 r16: 7 PIN: 0 ddr: 07 port: 00
pc: 1 r16: 7 PIN: 0 ddr: 07 port: 00
pc: 2 r16: 8 PIN: 0 ddr: 07 port: 00
pc: 3 r16: 8 PIN: z ddr: 08 port: 00
pc: 4 r16: 8 PIN: z ddr: 08 port: 00
pc: 1 r16: 8 PIN: z ddr: 08 port: 00
pc: 2 r16: 9 PIN: z ddr: 08 port: 00
pc: 3 r16: 9 PIN: 0 ddr: 09 port: 00
pc: 4 r16: 9 PIN: 0 ddr: 09 port: 00
pc: 1 r16: 9 PIN: 0 ddr: 09 port: 00
pc: 2 r16: 10 PIN: 0 ddr: 09 port: 00
pc: 3 r16: 10 PIN: z ddr: 0a port: 00
pc: 4 r16: 10 PIN: z ddr: 0a port: 00
pc: 1 r16: 10 PIN: z ddr: 0a port: 00
pc: 2 r16: 11 PIN: z ddr: 0a port: 00
pc: 3 r16: 11 PIN: 0 ddr: 0b port: 00
pc: 4 r16: 11 PIN: 0 ddr: 0b port: 00
pc: 1 r16: 11 PIN: 0 ddr: 0b port: 00
pc: 2 r16: 12 PIN: 0 ddr: 0b port: 00
pc: 3 r16: 12 PIN: z ddr: 0c port: 00
pc: 4 r16: 12 PIN: z ddr: 0c port: 00
pc: 1 r16: 12 PIN: z ddr: 0c port: 00
pc: 2 r16: 13 PIN: z ddr: 0c port: 00
pc: 3 r16: 13 PIN: 0 ddr: 0d port: 00
pc: 4 r16: 13 PIN: 0 ddr: 0d port: 00
pc: 1 r16: 13 PIN: 0 ddr: 0d port: 00
pc: 2 r16: 14 PIN: 0 ddr: 0d port: 00
pc: 3 r16: 14 PIN: z ddr: 0e port: 00
pc: 4 r16: 14 PIN: z ddr: 0e port: 00
pc: 1 r16: 14 PIN: z ddr: 0e port: 00
pc: 2 r16: 15 PIN: z ddr: 0e port: 00
pc: 3 r16: 15 PIN: 0 ddr: 0f port: 00
pc: 4 r16: 15 PIN: 0 ddr: 0f port: 00
pc: 1 r16: 15 PIN: 0 ddr: 0f port: 00
pc: 2 r16: 16 PIN: 0 ddr: 0f port: 00
pc: 3 r16: 16 PIN: z ddr: 10 port: 00
pc: 4 r16: 16 PIN: z ddr: 10 port: 00
pc: 1 r16: 16 PIN: z ddr: 10 port: 00
pc: 2 r16: 17 PIN: z ddr: 10 port: 00
pc: 3 r16: 17 PIN: 0 ddr: 11 port: 00
pc: 4 r16: 17 PIN: 0 ddr: 11 port: 00
pc: 1 r16: 17 PIN: 0 ddr: 11 port: 00
pc: 2 r16: 18 PIN: 0 ddr: 11 port: 00
pc: 3 r16: 18 PIN: z ddr: 12 port: 00
pc: 4 r16: 18 PIN: z ddr: 12 port: 00
pc: 1 r16: 18 PIN: z ddr: 12 port: 00
pc: 2 r16: 19 PIN: z ddr: 12 port: 00
pc: 3 r16: 19 PIN: 0 ddr: 13 port: 00
pc: 4 r16: 19 PIN: 0 ddr: 13 port: 00
pc: 1 r16: 19 PIN: 0 ddr: 13 port: 00
pc: 2 r16: 20 PIN: 0 ddr: 13 port: 00
pc: 3 r16: 20 PIN: z ddr: 14 port: 00
pc: 4 r16: 20 PIN: z ddr: 14 port: 00
pc: 1 r16: 20 PIN: z ddr: 14 port: 00
pc: 2 r16: 21 PIN: z ddr: 14 port: 00
pc: 3 r16: 21 PIN: 0 ddr: 15 port: 00
pc: 4 r16: 21 PIN: 0 ddr: 15 port: 00
pc: 1 r16: 21 PIN: 0 ddr: 15 port: 00
pc: 2 r16: 22 PIN: 0 ddr: 15 port: 00
pc: 3 r16: 22 PIN: z ddr: 16 port: 00
pc: 4 r16: 22 PIN: z ddr: 16 port: 00
pc: 1 r16: 22 PIN: z ddr: 16 port: 00
pc: 2 r16: 23 PIN: z ddr: 16 port: 00
pc: 3 r16: 23 PIN: 0 ddr: 17 port: 00
pc: 4 r16: 23 PIN: 0 ddr: 17 port: 00
pc: 1 r16: 23 PIN: 0 ddr: 17 port: 00
pc: 2 r16: 24 PIN: 0 ddr: 17 port: 00
pc: 3 r16: 24 PIN: z ddr: 18 port: 00
pc: 4 r16: 24 PIN: z ddr: 18 port: 00
pc: 1 r16: 24 PIN: z ddr: 18 port: 00
pc: 2 r16: 25 PIN: z ddr: 18 port: 00
pc: 3 r16: 25 PIN: 0 ddr: 19 port: 00
pc: 4 r16: 25 PIN: 0 ddr: 19 port: 00
pc: 1 r16: 25 PIN: 0 ddr: 19 port: 00
pc: 2 r16: 26 PIN: 0 ddr: 19 port: 00
pc: 3 r16: 26 PIN: z ddr: 1a port: 00
pc: 4 r16: 26 PIN: z ddr: 1a port: 00
pc: 1 r16: 26 PIN: z ddr: 1a port: 00
pc: 2 r16: 27 PIN: z ddr: 1a port: 00
pc: 3 r16: 27 PIN: 0 ddr: 1b port: 00
pc: 4 r16: 27 PIN: 0 ddr: 1b port: 00
pc: 1 r16: 27 PIN: 0 ddr: 1b port: 00
pc: 2 r16: 28 PIN: 0 ddr: 1b port: 00
pc: 3 r16: 28 PIN: z ddr: 1c port: 00
pc: 4 r16: 28 PIN: z ddr: 1c port: 00
pc: 1 r16: 28 PIN: z ddr: 1c port: 00
pc: 2 r16: 29 PIN: z ddr: 1c port: 00
pc: 3 r16: 29 PIN: 0 ddr: 1d port: 00
pc: 4 r16: 29 PIN: 0 ddr: 1d port: 00
pc: 1 r16: 29 PIN: 0 ddr: 1d port: 00
pc: 2 r16: 30 PIN: 0 ddr: 1d port: 00
pc: 3 r16: 30 PIN: z ddr: 1e port: 00
pc: 4 r16: 30 PIN: z ddr: 1e port: 00
pc: 1 r16: 30 PIN: z ddr: 1e port: 00
pc: 2 r16: 31 PIN: z ddr: 1e port: 00
pc: 3 r16: 31 PIN: 0 ddr: 1f port: 00
pc: 4 r16: 31 PIN: 0 ddr: 1f port: 00
pc: 1 r16: 31 PIN: 0 ddr: 1f port: 00
pc: 2 r16: 32 PIN: 0 ddr: 1f port: 00
pc: 3 r16: 32 PIN: z ddr: 20 port: 00
pc: 4 r16: 32 PIN: z ddr: 20 port: 00
pc: 1 r16: 32 PIN: z ddr: 20 port: 00
pc: 2 r16: 33 PIN: z ddr: 20 port: 00
pc: 3 r16: 33 PIN: 0 ddr: 21 port: 00
pc: 4 r16: 33 PIN: 0 ddr: 21 port: 00
pc: 1 r16: 33 PIN: 0 ddr: 21 port: 00
pc: 2 r16: 34 PIN: 0 ddr: 21 port: 00
pc: 3 r16: 34 PIN: z ddr: 22 port: 00
pc: 4 r16: 34 PIN: z ddr: 22 port: 00
pc: 1 r16: 34 PIN: z ddr: 22 port: 00
pc: 2 r16: 35 PIN: z ddr: 22 port: 00
pc: 3 r16: 35 PIN: 0 ddr: 23 port: 00
pc: 4 r16: 35 PIN: 0 ddr: 23 port: 00
pc: 1 r16: 35 PIN: 0 ddr: 23 port: 00
pc: 2 r16: 36 PIN: 0 ddr: 23 port: 00
pc: 3 r16: 36 PIN: z ddr: 24 port: 00
pc: 4 r16: 36 PIN: z ddr: 24 port: 00
pc: 1 r16: 36 PIN: z ddr: 24 port: 00
pc: 2 r16: 37 PIN: z ddr: 24 port: 00
pc: 3 r16: 37 PIN: 0 ddr: 25 port: 00
pc: 4 r16: 37 PIN: 0 ddr: 25 port: 00
pc: 1 r16: 37 PIN: 0 ddr: 25 port: 00
pc: 2 r16: 38 PIN: 0 ddr: 25 port: 00
pc: 3 r16: 38 PIN: z ddr: 26 port: 00
pc: 4 r16: 38 PIN: z ddr: 26 port: 00
pc: 1 r16: 38 PIN: z ddr: 26 port: 00
pc: 2 r16: 39 PIN: z ddr: 26 port: 00
pc: 3 r16: 39 PIN: 0 ddr: 27 port: 00
pc: 4 r16: 39 PIN: 0 ddr: 27 port: 00
pc: 1 r16: 39 PIN: 0 ddr: 27 port: 00
pc: 2 r16: 40 PIN: 0 ddr: 27 port: 00
pc: 3 r16: 40 PIN: z ddr: 28 port: 00
pc: 4 r16: 40 PIN: z ddr: 28 port: 00
pc: 1 r16: 40 PIN: z ddr: 28 port: 00
pc: 2 r16: 41 PIN: z ddr: 28 port: 00
pc: 3 r16: 41 PIN: 0 ddr: 29 port: 00
pc: 4 r16: 41 PIN: 0 ddr: 29 port: 00
pc: 1 r16: 41 PIN: 0 ddr: 29 port: 00
pc: 2 r16: 42 PIN: 0 ddr: 29 port: 00
pc: 3 r16: 42 PIN: z ddr: 2a port: 00
pc: 4 r16: 42 PIN: z ddr: 2a port: 00
pc: 1 r16: 42 PIN: z ddr: 2a port: 00
pc: 2 r16: 43 PIN: z ddr: 2a port: 00
pc: 3 r16: 43 PIN: 0 ddr: 2b port: 00
pc: 4 r16: 43 PIN: 0 ddr: 2b port: 00
pc: 1 r16: 43 PIN: 0 ddr: 2b port: 00
pc: 2 r16: 44 PIN: 0 ddr: 2b port: 00
pc: 3 r16: 44 PIN: z ddr: 2c port: 00
pc: 4 r16: 44 PIN: z ddr: 2c port: 00
pc: 1 r16: 44 PIN: z ddr: 2c port: 00
pc: 2 r16: 45 PIN: z ddr: 2c port: 00
pc: 3 r16: 45 PIN: 0 ddr: 2d port: 00
pc: 4 r16: 45 PIN: 0 ddr: 2d port: 00
pc: 1 r16: 45 PIN: 0 ddr: 2d port: 00
pc: 2 r16: 46 PIN: 0 ddr: 2d port: 00
pc: 3 r16: 46 PIN: z ddr: 2e port: 00
pc: 4 r16: 46 PIN: z ddr: 2e port: 00
pc: 1 r16: 46 PIN: z ddr: 2e port: 00
pc: 2 r16: 47 PIN: z ddr: 2e port: 00
pc: 3 r16: 47 PIN: 0 ddr: 2f port: 00
pc: 4 r16: 47 PIN: 0 ddr: 2f port: 00
pc: 1 r16: 47 PIN: 0 ddr: 2f port: 00
pc: 2 r16: 48 PIN: 0 ddr: 2f port: 00
pc: 3 r16: 48 PIN: z ddr: 30 port: 00
pc: 4 r16: 48 PIN: z ddr: 30 port: 00
pc: 1 r16: 48 PIN: z ddr: 30 port: 00
pc: 2 r16: 49 PIN: z ddr: 30 port: 00
pc: 3 r16: 49 PIN: 0 ddr: 31 port: 00
pc: 4 r16: 49 PIN: 0 ddr: 31 port: 00
pc: 1 r16: 49 PIN: 0 ddr: 31 port: 00
pc: 2 r16: 50 PIN: 0 ddr: 31 port: 00
pc: 3 r16: 50 PIN: z ddr: 32 port: 00
pc: 4 r16: 50 PIN: z ddr: 32 port: 00
pc: 1 r16: 50 PIN: z ddr: 32 port: 00
pc: 2 r16: 51 PIN: z ddr: 32 port: 00
pc: 3 r16: 51 PIN: 0 ddr: 33 port: 00
pc: 4 r16: 51 PIN: 0 ddr: 33 port: 00
pc: 1 r16: 51 PIN: 0 ddr: 33 port: 00
pc: 2 r16: 52 PIN: 0 ddr: 33 port: 00
pc: 3 r16: 52 PIN: z ddr: 34 port: 00
pc: 4 r16: 52 PIN: z ddr: 34 port: 00
pc: 1 r16: 52 PIN: z ddr: 34 port: 00
pc: 2 r16: 53 PIN: z ddr: 34 port: 00
pc: 3 r16: 53 PIN: 0 ddr: 35 port: 00
pc: 4 r16: 53 PIN: 0 ddr: 35 port: 00
pc: 1 r16: 53 PIN: 0 ddr: 35 port: 00
pc: 2 r16: 54 PIN: 0 ddr: 35 port: 00
pc: 3 r16: 54 PIN: z ddr: 36 port: 00
pc: 4 r16: 54 PIN: z ddr: 36 port: 00
pc: 1 r16: 54 PIN: z ddr: 36 port: 00
pc: 2 r16: 55 PIN: z ddr: 36 port: 00
pc: 3 r16: 55 PIN: 0 ddr: 37 port: 00
pc: 4 r16: 55 PIN: 0 ddr: 37 port: 00
pc: 1 r16: 55 PIN: 0 ddr: 37 port: 00
pc: 2 r16: 56 PIN: 0 ddr: 37 port: 00
pc: 3 r16: 56 PIN: z ddr: 38 port: 00
pc: 4 r16: 56 PIN: z ddr: 38 port: 00
pc: 1 r16: 56 PIN: z ddr: 38 port: 00
pc: 2 r16: 57 PIN: z ddr: 38 port: 00
pc: 3 r16: 57 PIN: 0 ddr: 39 port: 00
pc: 4 r16: 57 PIN: 0 ddr: 39 port: 00
pc: 1 r16: 57 PIN: 0 ddr: 39 port: 00
pc: 2 r16: 58 PIN: 0 ddr: 39 port: 00
pc: 3 r16: 58 PIN: z ddr: 3a port: 00
pc: 4 r16: 58 PIN: z ddr: 3a port: 00
pc: 1 r16: 58 PIN: z ddr: 3a port: 00
pc: 2 r16: 59 PIN: z ddr: 3a port: 00
pc: 3 r16: 59 PIN: 0 ddr: 3b port: 00
pc: 4 r16: 59 PIN: 0 ddr: 3b port: 00
pc: 1 r16: 59 PIN: 0 ddr: 3b port: 00
pc: 2 r16: 60 PIN: 0 ddr: 3b port: 00
pc: 3 r16: 60 PIN: z ddr: 3c port: 00
pc: 4 r16: 60 PIN: z ddr: 3c port: 00
pc: 1 r16: 60 PIN: z ddr: 3c port: 00
pc: 2 r16: 61 PIN: z ddr: 3c port: 00
pc: 3 r16: 61 PIN: 0 ddr: 3d port: 00
pc: 4 r16: 61 PIN: 0 ddr: 3d port: 00
pc: 1 r16: 61 PIN: 0 ddr: 3d port: 00
pc: 2 r16: 62 PIN: 0 ddr: 3d port: 00
pc: 3 r16: 62 PIN: z ddr: 3e port: 00
pc: 4 r16: 62 PIN: z ddr: 3e port: 00
pc: 1 r16: 62 PIN: z ddr: 3e port: 00
pc: 2 r16: 63 PIN: z ddr: 3e port: 00
pc: 3 r16: 63 PIN: 0 ddr: 3f port: 00
pc: 4 r16: 63 PIN: 0 ddr: 3f port: 00
pc: 1 r16: 63 PIN: 0 ddr: 3f port: 00
pc: 2 r16: 64 PIN: 0 ddr: 3f port: 00
pc: 3 r16: 64 PIN: z ddr: 40 port: 00
pc: 4 r16: 64 PIN: z ddr: 40 port: 00
pc: 1 r16: 64 PIN: z ddr: 40 port: 00
pc: 2 r16: 65 PIN: z ddr: 40 port: 00
pc: 3 r16: 65 PIN: 0 ddr: 41 port: 00
pc: 4 r16: 65 PIN: 0 ddr: 41 port: 00
pc: 1 r16: 65 PIN: 0 ddr: 41 port: 00
pc: 2 r16: 66 PIN: 0 ddr: 41 port: 00
pc: 3 r16: 66 PIN: z ddr: 42 port: 00
pc: 4 r16: 66 PIN: z ddr: 42 port: 00
pc: 1 r16: 66 PIN: z ddr: 42 port: 00
pc: 2 r16: 67 PIN: z ddr: 42 port: 00
pc: 3 r16: 67 PIN: 0 ddr: 43 port: 00
pc: 4 r16: 67 PIN: 0 ddr: 43 port: 00
pc: 1 r16: 67 PIN: 0 ddr: 43 port: 00
pc: 2 r16: 68 PIN: 0 ddr: 43 port: 00
pc: 3 r16: 68 PIN: z ddr: 44 port: 00
pc: 4 r16: 68 PIN: z ddr: 44 port: 00
pc: 1 r16: 68 PIN: z ddr: 44 port: 00
pc: 2 r16: 69 PIN: z ddr: 44 port: 00
pc: 3 r16: 69 PIN: 0 ddr: 45 port: 00
pc: 4 r16: 69 PIN: 0 ddr: 45 port: 00
pc: 1 r16: 69 PIN: 0 ddr: 45 port: 00
pc: 2 r16: 70 PIN: 0 ddr: 45 port: 00
pc: 3 r16: 70 PIN: z ddr: 46 port: 00
pc: 4 r16: 70 PIN: z ddr: 46 port: 00
pc: 1 r16: 70 PIN: z ddr: 46 port: 00
pc: 2 r16: 71 PIN: z ddr: 46 port: 00
pc: 3 r16: 71 PIN: 0 ddr: 47 port: 00
pc: 4 r16: 71 PIN: 0 ddr: 47 port: 00
pc: 1 r16: 71 PIN: 0 ddr: 47 port: 00
pc: 2 r16: 72 PIN: 0 ddr: 47 port: 00
pc: 3 r16: 72 PIN: z ddr: 48 port: 00
pc: 4 r16: 72 PIN: z ddr: 48 port: 00
pc: 1 r16: 72 PIN: z ddr: 48 port: 00
pc: 2 r16: 73 PIN: z ddr: 48 port: 00
pc: 3 r16: 73 PIN: 0 ddr: 49 port: 00
pc: 4 r16: 73 PIN: 0 ddr: 49 port: 00
pc: 1 r16: 73 PIN: 0 ddr: 49 port: 00
pc: 2 r16: 74 PIN: 0 ddr: 49 port: 00
pc: 3 r16: 74 PIN: z ddr: 4a port: 00
pc: 4 r16: 74 PIN: z ddr: 4a port: 00
pc: 1 r16: 74 PIN: z ddr: 4a port: 00
pc: 2 r16: 75 PIN: z ddr: 4a port: 00
pc: 3 r16: 75 PIN: 0 ddr: 4b port: 00
pc: 4 r16: 75 PIN: 0 ddr: 4b port: 00
pc: 1 r16: 75 PIN: 0 ddr: 4b port: 00
pc: 2 r16: 76 PIN: 0 ddr: 4b port: 00
pc: 3 r16: 76 PIN: z ddr: 4c port: 00
pc: 4 r16: 76 PIN: z ddr: 4c port: 00
pc: 1 r16: 76 PIN: z ddr: 4c port: 00
pc: 2 r16: 77 PIN: z ddr: 4c port: 00
pc: 3 r16: 77 PIN: 0 ddr: 4d port: 00
pc: 4 r16: 77 PIN: 0 ddr: 4d port: 00
pc: 1 r16: 77 PIN: 0 ddr: 4d port: 00
pc: 2 r16: 78 PIN: 0 ddr: 4d port: 00
pc: 3 r16: 78 PIN: z ddr: 4e port: 00
pc: 4 r16: 78 PIN: z ddr: 4e port: 00
pc: 1 r16: 78 PIN: z ddr: 4e port: 00
pc: 2 r16: 79 PIN: z ddr: 4e port: 00
pc: 3 r16: 79 PIN: 0 ddr: 4f port: 00
pc: 4 r16: 79 PIN: 0 ddr: 4f port: 00
pc: 1 r16: 79 PIN: 0 ddr: 4f port: 00
pc: 2 r16: 80 PIN: 0 ddr: 4f port: 00
pc: 3 r16: 80 PIN: z ddr: 50 port: 00
pc: 4 r16: 80 PIN: z ddr: 50 port: 00
pc: 1 r16: 80 PIN: z ddr: 50 port: 00
pc: 2 r16: 81 PIN: z ddr: 50 port: 00
pc: 3 r16: 81 PIN: 0 ddr: 51 port: 00
pc: 4 r16: 81 PIN: 0 ddr: 51 port: 00
pc: 1 r16: 81 PIN: 0 ddr: 51 port: 00
pc: 2 r16: 82 PIN: 0 ddr: 51 port: 00
pc: 3 r16: 82 PIN: z ddr: 52 port: 00
pc: 4 r16: 82 PIN: z ddr: 52 port: 00
pc: 1 r16: 82 PIN: z ddr: 52 port: 00
pc: 2 r16: 83 PIN: z ddr: 52 port: 00
pc: 3 r16: 83 PIN: 0 ddr: 53 port: 00
pc: 4 r16: 83 PIN: 0 ddr: 53 port: 00
pc: 1 r16: 83 PIN: 0 ddr: 53 port: 00
pc: 2 r16: 84 PIN: 0 ddr: 53 port: 00
pc: 3 r16: 84 PIN: z ddr: 54 port: 00
pc: 4 r16: 84 PIN: z ddr: 54 port: 00
pc: 1 r16: 84 PIN: z ddr: 54 port: 00
pc: 2 r16: 85 PIN: z ddr: 54 port: 00
pc: 3 r16: 85 PIN: 0 ddr: 55 port: 00
pc: 4 r16: 85 PIN: 0 ddr: 55 port: 00
pc: 1 r16: 85 PIN: 0 ddr: 55 port: 00
pc: 2 r16: 86 PIN: 0 ddr: 55 port: 00
pc: 3 r16: 86 PIN: z ddr: 56 port: 00
pc: 4 r16: 86 PIN: z ddr: 56 port: 00
pc: 1 r16: 86 PIN: z ddr: 56 port: 00
pc: 2 r16: 87 PIN: z ddr: 56 port: 00
pc: 3 r16: 87 PIN: 0 ddr: 57 port: 00
pc: 4 r16: 87 PIN: 0 ddr: 57 port: 00
pc: 1 r16: 87 PIN: 0 ddr: 57 port: 00
pc: 2 r16: 88 PIN: 0 ddr: 57 port: 00
pc: 3 r16: 88 PIN: z ddr: 58 port: 00
pc: 4 r16: 88 PIN: z ddr: 58 port: 00
pc: 1 r16: 88 PIN: z ddr: 58 port: 00
pc: 2 r16: 89 PIN: z ddr: 58 port: 00
pc: 3 r16: 89 PIN: 0 ddr: 59 port: 00
pc: 4 r16: 89 PIN: 0 ddr: 59 port: 00
pc: 1 r16: 89 PIN: 0 ddr: 59 port: 00
pc: 2 r16: 90 PIN: 0 ddr: 59 port: 00
pc: 3 r16: 90 PIN: z ddr: 5a port: 00
pc: 4 r16: 90 PIN: z ddr: 5a port: 00
pc: 1 r16: 90 PIN: z ddr: 5a port: 00
pc: 2 r16: 91 PIN: z ddr: 5a port: 00
pc: 3 r16: 91 PIN: 0 ddr: 5b port: 00
pc: 4 r16: 91 PIN: 0 ddr: 5b port: 00
pc: 1 r16: 91 PIN: 0 ddr: 5b port: 00
pc: 2 r16: 92 PIN: 0 ddr: 5b port: 00
pc: 3 r16: 92 PIN: z ddr: 5c port: 00
pc: 4 r16: 92 PIN: z ddr: 5c port: 00
pc: 1 r16: 92 PIN: z ddr: 5c port: 00
pc: 2 r16: 93 PIN: z ddr: 5c port: 00
pc: 3 r16: 93 PIN: 0 ddr: 5d port: 00
pc: 4 r16: 93 PIN: 0 ddr: 5d port: 00
pc: 1 r16: 93 PIN: 0 ddr: 5d port: 00
pc: 2 r16: 94 PIN: 0 ddr: 5d port: 00
pc: 3 r16: 94 PIN: z ddr: 5e port: 00
pc: 4 r16: 94 PIN: z ddr: 5e port: 00
pc: 1 r16: 94 PIN: z ddr: 5e port: 00
pc: 2 r16: 95 PIN: z ddr: 5e port: 00
pc: 3 r16: 95 PIN: 0 ddr: 5f port: 00
pc: 4 r16: 95 PIN: 0 ddr: 5f port: 00
pc: 1 r16: 95 PIN: 0 ddr: 5f port: 00
pc: 2 r16: 96 PIN: 0 ddr: 5f port: 00
pc: 3 r16: 96 PIN: z ddr: 60 port: 00
pc: 4 r16: 96 PIN: z ddr: 60 port: 00
pc: 1 r16: 96 PIN: z ddr: 60 port: 00
pc: 2 r16: 97 PIN: z ddr: 60 port: 00
pc: 3 r16: 97 PIN: 0 ddr: 61 port: 00
pc: 4 r16: 97 PIN: 0 ddr: 61 port: 00
pc: 1 r16: 97 PIN: 0 ddr: 61 port: 00
pc: 2 r16: 98 PIN: 0 ddr: 61 port: 00
pc: 3 r16: 98 PIN: z ddr: 62 port: 00
pc: 4 r16: 98 PIN: z ddr: 62 port: 00
pc: 1 r16: 98 PIN: z ddr: 62 port: 00
pc: 2 r16: 99 PIN: z ddr: 62 port: 00
pc: 3 r16: 99 PIN: 0 ddr: 63 port: 00
pc: 4 r16: 99 PIN: 0 ddr: 63 port: 00
pc: 1 r16: 99 PIN: 0 ddr: 63 port: 00
pc: 2 r16: 100 PIN: 0 ddr: 63 port: 00
pc: 3 r16: 100 PIN: z ddr: 64 port: 00
pc: 4 r16: 100 PIN: z ddr: 64 port: 00
pc: 5 r16: 100 PIN: z ddr: 64 port: 00
avr3.v:296: $finish called at 3008 (1s)
サンプルコード
module avr(input clk, input rst, inout [7:0] gpio);
parameter CMD_RJMP = 16'b1100xxxxxxxxxxxx;//rjmp
parameter CMD_LDI = 16'b1110xxxxxxxxxxxx;//ldi
parameter CMD_SUBI = 16'b0101xxxxxxxxxxxx;
parameter CMD_CPI = 16'b0011xxxxxxxxxxxx;
parameter CMD_IN = 16'b10110xxxxxxxxxxx;//in 0-pin 1-ddr 2-port
parameter CMD_OUT = 16'b10111xxxxxxxxxxx;//out 0-pin 1-ddr 2-port
parameter CMD_MOV = 16'b001011xxxxxxxxxx;
parameter CMD_ADD = 16'b000011xxxxxxxxxx;
parameter CMD_SUB = 16'b000110xxxxxxxxxx;
parameter CMD_MUL = 16'b100111xxxxxxxxxx;
parameter CMD_ADC = 16'b000111xxxxxxxxxx;
parameter CMD_SBC = 16'b000010xxxxxxxxxx;
parameter CMD_AND = 16'b001000xxxxxxxxxx;
parameter CMD_EOR = 16'b001001xxxxxxxxxx;
parameter CMD_OR = 16'b001010xxxxxxxxxx;
parameter CMD_BREQ = 16'b111100xxxxxxx001;//breq
parameter CMD_BRNE = 16'b111101xxxxxxx001;//brne
parameter CMD_BRCS = 16'b111100xxxxxxx000;
parameter CMD_BRCC = 16'b111101xxxxxxx000;
parameter CMD_INC = 16'b1001010xxxxx0011;//inc +1
parameter CMD_DEC = 16'b1001010xxxxx1010;//dec -1
parameter CMD_LSR = 16'b1001010xxxxx0110;//lsr 右シフト
parameter CMD_ANDI = 16'b0111xxxxxxxxxxxx;//andi 定数と&
parameter CMD_ORI = 16'b0110xxxxxxxxxxxx;//ori 定数と|
parameter CMD_SBRC = 16'b1111110xxxxxxxxx;//sbrc Bit sss が 0 なら次をスキップ
parameter CMD_SBRS = 16'b1111111xxxxxxxxx;//sbrs Bit sss が 1 なら次をスキップ
parameter CMD_SBI = 16'b10011010xxxxxxxx;//sbi port, bit
parameter CMD_CBI = 16'b10011000xxxxxxxx;//cbi port, bit
reg [7:0] pc;
reg [7:0] registers[0:31];
reg [15:0] rom[0:30];
reg I,
T,
H,
S,
V,
N,
Z = 0,
C = 0;
reg [7:0] DDR;
reg [7:0] PORT;
wire [15:0] opcode;
wire [7:0] gpio;
wire [7:0] PIN;
wire [4:0] src;
wire [4:0] dest;
wire [5:0] io_addr;
wire [6:0] k;
wire [7:0] K;
wire [7:0] Rs = registers[src[4:0]];
wire [7:0] Rd = registers[dest[4:0]];
wire [7:0] Rsi = registers[{1'b1, dest[3:0]}];
wire [7:0] Ri = Rsi - K;
wire [7:0] R = Rd + (opcode[10] & opcode[12] & ~C | ~opcode[10] & ~opcode[12] & C ? 0 : 1) + (opcode[10] ? Rs : ~Rs);
wire [6:0] k_rel = opcode[9:3];
wire signed [7:0] br_offset = {{1{k_rel[6]}}, k_rel};
wire signed [12:0] rjmp_offset = {{1{opcode[11]}}, opcode[11:0]};
assign opcode = rom[pc];
assign src = {opcode[9], opcode[3], opcode[2], opcode[1], opcode[0]};
assign dest = {opcode[8], opcode[7], opcode[6], opcode[5], opcode[4]};
assign k = {opcode[9], opcode[8], opcode[7], opcode[6], opcode[5], opcode[4], opcode[3]};
assign K = {opcode[11], opcode[10], opcode[9], opcode[8], opcode[3], opcode[2], opcode[1], opcode[0]};
assign io_addr = {opcode[10:9], opcode[3:0]};
genvar i;
for (i = 0; i < 8; i = i + 1)
begin
assign gpio[i] = DDR[i] ? PORT[i] : 1'bz;
end
assign PIN = gpio;
initial
begin
$monitor(" pc: %d r16: %d PIN: %d ddr: %h port: %h ", pc, registers[16], PIN[0], DDR, PORT);
end
always @(posedge clk)
begin
if (rst)
begin
pc <= 0;
DDR <= 8'b0;
PORT <= 8'b0;
rom[0] <= 16'hE000; // avr.ldi(16, 0)
rom[1] <= 16'h9503; // avr.inc(16)
rom[2] <= 16'hB901; // avr.out(1, 16)
rom[3] <= 16'h3604; // avr.cpi(16, 100)
rom[4] <= 16'hF7E1; // avr.brne(-3)
rom[5] <= 16'hC000; //
end
else
begin
if (opcode[15:10] == CMD_ADD[15:10])//o 000011rdddddrrrr add
begin
registers[dest[4:0]] <= R;
Z <= ~| R;
C <= Rs[7] & ~R[7] | Rd[7] & ~R[7] | Rs[7] & Rd[7];
end
if (opcode[15:10] == CMD_ADC[15:10])//o 000111rdddddrrrr adc
begin
registers[dest[4:0]] <= R;
Z <= ~| R;
C <= Rs[7] & ~R[7] | Rd[7] & ~R[7] | Rs[7] & Rd[7];
end
if (opcode[15:10] == CMD_SUB[15:10])//o 000110rdddddrrrr sub
begin
registers[dest[4:0]] <= R;
Z <= ~| R;
C <= Rs[7] & ~Rd[7] | R[7] & ~Rd[7] | Rs[7] & R[7];
end
if (opcode[15:10] == CMD_SBC[15:10])//o 000010rdddddrrrr sbc
begin
registers[dest[4:0]] <= R;
Z <= ~| R;
C <= Rs[7] & ~Rd[7] | R[7] & ~Rd[7] | Rs[7] & R[7];
end
if (opcode[15:10] == CMD_AND[15:10])
begin
registers[dest[4:0]] <= registers[dest[4:0]] & registers[src[4:0]];
end
if (opcode[15:10] == CMD_EOR[15:10])
begin
registers[dest[4:0]] <= registers[dest[4:0]] ^ registers[src[4:0]];
end
if (opcode[15:10] == CMD_OR[15:10])
begin
registers[dest[4:0]] <= registers[dest[4:0]] | registers[src[4:0]];
end
if (opcode[15:10] == CMD_MOV[15:10])
begin
registers[dest[4:0]] <= registers[src[4:0]];
end
if (opcode[15:10] == CMD_MUL[15:10])
begin
registers[0] <= registers[dest[4:0]] * registers[src[4:0]];
end
if (opcode[15:11] == CMD_IN[15:11])
begin
if (io_addr == 6'd0)
begin
registers[dest[4:0]] <= PIN;
end
if (io_addr == 6'd1)
begin
registers[dest[4:0]] <= DDR;
end
if (io_addr == 6'd2)
begin
registers[dest[4:0]] <= PORT;
end
end
if (opcode[15:11] == CMD_OUT[15:11])
begin
if (io_addr == 6'd1)
begin
DDR <= Rd;
end
if (io_addr == 6'd2)
begin
PORT <= Rd;
end
end
if (opcode[15:8] == CMD_SBI[15:8]) //10011010pppppsss sbi
begin
case (opcode[7:3])
5'd1:
DDR[opcode[2:0]] <= 1'b1;
5'd2:
PORT[opcode[2:0]] <= 1'b1;
default: ;
endcase
end
if (opcode[15:8] == CMD_CBI[15:8])//10011000pppppsss cbi
begin
case (opcode[7:3])
5'd1:
DDR[opcode[2:0]] <= 1'b0;
5'd2:
PORT[opcode[2:0]] <= 1'b0;
default: ;
endcase
end
if (opcode[15:12] == CMD_LDI[15:12])
begin
registers[{1'b1, dest[3:0]}] <= K;
end
if (opcode[15:12] == CMD_ANDI[15:12])
begin
registers[{1'b1, dest[3:0]}] <= registers[{1'b1, dest[3:0]}] & K;
end
if (opcode[15:12] == CMD_ORI[15:12])
begin
registers[{1'b1, dest[3:0]}] <= registers[{1'b1, dest[3:0]}] | K;
end
if (opcode[15:12] == CMD_SUBI[15:12])
begin
registers[{1'b1, dest[3:0]}] <= Ri;
Z <= ~| Ri;
end
if (opcode[15:12] == CMD_CPI[15:12])
begin
Z <= ~| Ri;
C <= Rs[7] & ~Rd[7] | Ri[7] & ~Rd[7] | Rs[7] & Ri[7];
end
if ({opcode[15:10], opcode[3:0]} == {CMD_INC[15:10], CMD_INC[3:0]})
begin
registers[dest[4:0]] <= registers[dest[4:0]] + 1;
end
if ({opcode[15:10], opcode[3:0]} == {CMD_DEC[15:10], CMD_DEC[3:0]})
begin
registers[dest[4:0]] <= registers[dest[4:0]] - 1;
Z <= ~| Rd;
end
if ({opcode[15:10], opcode[3:0]} == {CMD_LSR[15:10], CMD_LSR[3:0]})
begin
registers[dest[4:0]] <= registers[dest[4:0]] >> 1;
end
if (opcode[15:9] == CMD_SBRC[15:9])//1111110xxxxxxxxx;//sbrc
begin
if (Rd[opcode[3:0]] == 1'd0)
begin
pc <= pc + 2'd2;
end
else
begin
pc <= pc + 1'd1;
end
end
if (opcode[15:9] == CMD_SBRS[15:9])//1111111xxxxxxxxx;//sbrs
begin
if (Rd[opcode[3:0]] == 1'd1)
begin
pc <= pc + 2'd2;
end
else
begin
pc <= pc + 1'd1;
end
end
//if ({opcode[15:11], opcode[2:0]} == {CMD_BREQ[15:11], CMD_BREQ[2:0]})//o 111100xxxxxxx001 breq
if ({opcode[15:11], opcode[2:0]} == {CMD_BRNE[15:11], CMD_BRNE[2:0]})//o 111101xxxxxxx001 brne
begin
if (Z ^ opcode[10])
begin
pc <= pc + br_offset + 1;
end
else
begin
pc <= pc + 1'd1;
end
end
else
begin
if (opcode[15:12] == CMD_RJMP[15:12])//o 1100xxxxxxxxxxxx rjmp
begin
pc <= pc + rjmp_offset;
end
else
begin
pc <= pc + 1'd1;
end
end
end
end
endmodule
module test;
reg clk,
rst;
wire [7:0] outport;
avr u(.clk(clk), .rst(rst), .gpio(outport));
initial
begin
$dumpfile("test.vcd");
$dumpvars(0, test);
//$monitor(" %h", outport);
clk = 0;
rst = 0;
#4
rst = 1;
#4
rst = 0;
#3000
$finish;
end
always
#1
clk = ~clk;
endmodule
以上。
