GATE EC||ANALOG ELECTRONIC||CURRENT MIRROR CIRCUIT||PYQS(2000-2025)

For the circuit shown in the following figure, transistors M₁ and M₂ are identical NMOS transistors. Assume that M₂ is in saturation and the output is unloaded

The current I_x is related to I_bias as

(GATE 2008 || EC || PYQ || MCQ || 2 MARKS)

In the silicon BJT circuit shown below, assume that the emitter area of transistor Q₁ is half that of transistor Q₂.

The value of current I₀ is approximately

(GATE 2010 || EC || PYQ || MCQ || 1 MARKS)

Resistor R₁ in the circuit below has been adjusted so that I₁ = 1 mA. The bipolar transistors Q₁ and Q₂ are perfectly matched and have very high current gain, so their base currents are negligible. The supply voltage V_cc is 6 V. The thermal voltage kT/q is 26 mV.

The value of R₂ (in Ω) for which I₂ = 100 μA is.

(GATE 2016 || EC || PYQ || NAT ||1 MARKS)

In the circuit shown, V₁ = 0 and V₂ = V_dd. The other relevant parameters are mentioned in the figure. Ignoring the effect of channel length modulation and the body effect, the value of I_out is ___________ mA (rounded off to 1 decimal place).

(GATE 2019 || EC || PYQ || NAT ||2 MARKS)

In a simple MOS current mirror, channel length modulation causes:

(GATE 2012 || EC || PYQ || MCQ || 1 MARKS)

In a current mirror, the minimum output voltage required to keep MOSFET in saturation is called:

(GATE 2016 || EC || PYQ || MCQ || 1 MARKS)

For an ideal current mirror, the output resistance should be:

(GATE 2021 || EC || PYQ || MCQ || 1 MARKS)