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TOPPERS/HRP2 kernel

The TOPPERS/HRP2 kernel (HRP stands for "High Reliable system Profile", and 2 is the version number. Hereafter, HRP2 kernel) is an extension of the TOPPERS/ASP kernel, the main starting point for the TOPPERS next generation kernels. It adds functionality for satisfying high reliability and safety requirements of large-scale embedded systems.

Compared to the ASP kernel, the HRP2 kernel introduces the following modifications.

  • Memory protection.
  • Object access protection functionality.
  • Extended service call functionality.
  • Mutex functionality.
  • Overrun handlers functionality.
  • Deprecates mailboxes functionality.

Compared to the previous version, the TOPPERS/HRP kernel, which was based on the protection extensions of the μITORN4.0 specification, the HRP2 kernel introduces the following modifications.

  • Conformance to the TOPPERS next generation kernels specification.
  • Support for memory protection units (MPU).
  • The allocation of program code and memory is set up through a configurator tool.
  • Memory protection information is generated statically.

The main characteristic of the HRP2 kernel is that it supports both memory management units (MMU) and memory protection units (MPU). An MPU provides memory access protection by hardware, but does not provide address translation functionality. It is suitable for embedded systems with hard real-time requirements, although the regions of memory that can be protected are dependent on the target processor.

In the HRP2 kernel, it is possible to specify the protection parameters of the memory region containing each object file (or section). The configurator tool determines the allocation of each section into memory, and statically generates the corresponding memory protection information (e.g., the MMU page table).

For that reason, the application designer does not need to know the details about the memory protection configuration of the target processor in order to use memory protection functionality.

TOPPERS/HRP2 kernel download method

The HRP2 kernel is distributed as combined packages that include the target-dependent and target-independent part, or as separatedpackages. Please click here to download.

The HRP2 kernel specification is included in the TOPPERS next generation integral specification document (at the moment only in Japanese, TOPPERS新世代カーネル統合仕様書) which can be downloaded here. Finally, the source code of the configurator tool can be downloaded here.

Target systems

At present, the HRP2 kernel supports the following target processor/systems.

Folder name Development environment

 
Processor MPU / MMU System (maker name)
arm_m_gcc GCC
  ARM (ARM Cortex-M3) MPU LM3SXXXX (TEXAS INSTRUMENTS)
  ARM (ARM Cortex-M3) MPU STM32-P207 (Olimex)
sh12a_gcc GCC
  SH2A (SH72AW) MPU SH2A-MG-EVB02 (Renesas Electronics)
sh34_gcc GCC
  SH4 (SH7750R) MMU AP-SH4-1A (Alpha project)
  SH4 (SH7750R) MMU SOI-SoC (Mitsubishi Heavy Industries Ltd.)

Future plans

  • Porting to new boards
    • ARM11 MPCore (MMU)
    • ARM Cortex-A9 (MMU)
    • V850 (MPU)
  • Extensions to the memory allocation optimization functionality of the ARM Cortex-M3 dependent part.
  • Support for multi-page size in the SH4 dependent part.

Development staff

The following list of people have participated in the development of the TOPPERS/HRP2 kernel as members of the TOPPERS project.

Name Place of work Period Maintance
Hiroaki TAKADA Nagoya University 2007~ HRP2 kernel body
Nobuhisa TAKAGI Individual Special member 2006~ Configurator tool
Shinya HONDA Nagoya University 2007~ ARM11 MPCore
Mitsutaka TAKADA Nagoya University 2011~ APSH4_SHC, SOI-SoC
Takuya ISHIKAWA Nagoya University 2009~ SH2A, APSH4_GCC, ARM Cortex-M3
Toshikazu KATO Nagoya University 2011~ ARM Cortex-A9

* Only mentioned the names of those developers that acknowledge its publication.

Papers (only in Japanese)

  1. 石川拓也,本田晋也,高田広章, 静的なメモリ配置を行うメモリ保護機能を持ったリアルタイムOS,コンピュータソフトウェア,Vol.29,No.4,pp. 161-181,Nov 2012.
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